मालवीय राष्ट्रीय प्रौद्योगिकी संस्थान जयपुर (राष्ट्रीय महत्व का संस्थान)
Malaviya National Institute of Technology Jaipur (An Institute of National Importance)
Department of Electronics & Communication Engineering
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68

Journal Publications

12

Conference Publications

1

Research Projects

2

PhD Research Supervised

4

Awards & Honours

Qualifications
  • Ph.D.(Advanced MOS Devices) from NIT Silchar(2018)
    M.Tech.(Mobile Comm. & Computing) from NIT Arunachal Pradesh(2015)
    B.E.(Electronics & Telecomm. Engg.) from Assam Engineering College(2012)
Research Interests

Modeling and Simulation Nano Devices, MEMS, Bio Sensing.

Brief Research Profile

Rajesh Saha has received B.E. with honours in Electronics and Telecommunication Engineering from Assam Engineering College, Guwahati, Assam in 2012 and M.Tech. in Mobile Communication and Computing from NIT Arunachal Pradesh, Yupia, Arunachal Pradesh in 2015. He has received Ph.D. in Electronics and Communication from NIT Silchar, Silchar, Assam in 2018. He has worked as Junior Research Fellow in IIT Guwahati, Assam from September 2012 to April 2013. Before joining MNIT Jaipur, he has worked as Assistant Professor in School of Electronics Engineering, VIT AP University, Amaravati, Andhra Pradesh from May 2018 to February 2020. His research interest includes Modeling and Simulation of Nanoelectronics Devices, Biosensors, MEMS. He is the reviewer of various IEEE Transactions, IEEE EDL, IET Journals/Letters, Elsevier Journals, Springer Journals.

Professional Background
  • Research Associate at NIT Silchar [05 March 2020 - 30 April 2020].
    Assistant Professor at MNIT Jaipur [27 February 2020 - Present].
    Assistant Professor at VIT AP University [09 May 2018 - 26 February 2020].

  • Applied Electronics
  • Basic Electronics and Electrical Engineering
  • Basic Electronics Engineering
  • Control System Engineering
  • Digital CMOS IC
  • Network Theory

    2023
  • Ravindra Kumar Maurya, Vivek Kumar, Rajesh Saha, and Brinda Bhowmick , "Effect of curie temperature on electrical parameters of NC-FinFET and digital switching application of NC-FinFET" , Microelectronics Journal (Elsevier) Volume :139 / / 2023 DOI: https://doi.org/10.1016/j.mejo.2023.105892
  • Shreyas Tiwari, Lobzang Chonzom, and Rajesh Saha, "Optical FOMs of extended-source DGTFET photodetector in the visible range of the spectrum" , Semiconductor Science and Technology (IOP) Volume :38 / / 2023 DOI: 10.1088/1361-6641/acb508
  • Pratyusha Nune, Santanu Mandal, Amit Saha, and Rajesh Saha, "A generic simple model of synaptic memristor with local activity for neuromorphic applications" , Journal of Computational Electronics (Springer ) Volume :Accepted / / 2023 DOI: https://doi.org/10.1007/s10825-023-02007-
  • Rajesh Saha, Deepak Panda, and Rupam Goswami, "Dependence of RF/analog and linearity parameters on ferroelectric layer thickness in ferroelectric tunnel junction dual material double gate (FTJ-DMDG) TFET" , Ferroelectrics (Wiley) Volume :602 / 204-214 / 2023 DOI: https://doi.org/10.1080/00150193.2022.2149315
  • Ravindra Kumar Maurya, Rajesh Saha, and Brinda Bhowmick, "Low to high-frequency noise behavior investigation of steeper sub-threshold swing NC-GeFinFET" , Microelectronics Journal (Elsevier) Volume :131 / / 2023 DOI: https://doi.org/10.1016/j.mejo.2022.105642
  • Shreyas Tiwari and Rajesh Saha, "Optical Performance of Split-Source Z-Shaped Horizontal-Pocket and Hetero-Stacked TFET-Based Photosensors" , Journal of Electronics Material (Springer) Volume :52 / / 2023 DOI: https://doi.org/10.1007/s11664-022-10140-9
  • Rajesh Saha, Deepak Kumar Panda, and Rupam Goswami, "Investigation on RF/Analog Performance in SiGe Pocket n-Tunnel FET" , IETE Journal of Research (Wiley) Volume :Accepted / / 2023 DOI: https://doi.org/10.1080/03772063.2023.2181227
  • Rashi Chaudhary and Rajesh Saha, "Impact of self-heating on RF/analog and linearity parameters of DMG FinFETs in underlap and overlap configurations" , Microelectronics Journal (Elsevier) Volume :135 / / 2023 DOI: https://doi.org/10.1016/j.mejo.2023.105765
  • Shreyas Tiwari and Rajesh Saha, "Trap Sensitivity of Splitted Source Z Shape Horizontal Pocket and Hetero Stack TFETs: A Simulation Study" , Physica Scripta (IOP) Volume :Accepted / / 2023 DOI: 10.1088/1402-4896/acc6fd
  • Rajesh Saha, Rupam Goswami, Brinda Bhowmick, Srimanta Baishya, "Simulation study of n+ pocket step shape heterodielectric double gate tunnel FET for switching and biosensing applications" , Materials Science and Engineering: B (Elsevier) Volume :293 / 116491 / 2023 DOI: 10.1016/j.mseb.2023.116491
  • Rajesh Saha, Rupam Goswami, and Shanidul Hoque, "Investigation on Effect of Interface Trap Charges and Temperature in Gate Overlap Graphene Source Step Shape Double Gate Tunnel FET" , ECS Journal of Solid State Science and Technology (IoP) Volume : 12 / 083004 / 2023 DOI: 10.1149/2162-8777/acec10
  • Khan Abdulkarim Abdulquyyaum, Shreyas Tiwari, Rajesh Saha, Shandiul Hoque, " Sensitivity extraction of step shape double gate (SSDG) TFET biosensor considering non-ideal scenario" , Engineering Research Express (IOP) Volume :5 / 035049 / 2023 DOI: 10.1088/2631-8695/acf18a
  • Shreyas Tiwari and Rajesh Saha, "Sensitivity Analysis of I-shape TFET Biosensor Considering Repulsive Steric and Trap Effects" , IEEE Transactions on Nanotechnology (IEEE) Volume :NA / / 2023 DOI: 10.1109/TNANO.2023.3309411
  • Lakshmi Nivas Teja, Rashi Chaudhary, Shreyas Tiwari, Rajesh Saha, "Reliability study of nano ribbon FET with temperature variation including interface trap charges" , Materials Science and Engineering: B (Elsevier) Volume :298 / / 2023 DOI: https://doi.org/10.1016/j.mseb.2023.116877
  • S. Tiwari and R. Saha, "Switching and photosensitive analysis of dopingless tunnel field effect transistor based on cladding layer concept" , Micro and Nanostructures (Elsevier) (Elsevier) Volume :184 / / 2023 DOI: https://doi.org/10.1016/j.micrna.2023.207673
  • S. Tiwari and R. Saha, "Photo sensing Analysis of T-shape TFET sensor under visible range of spectrum" , Physica Scripta (IOP) Volume :0 / / 2023 DOI: 10.1088/1402-4896/acfc77
  • Shreyas Tiwari and Rajesh Saha , "Sensitivity analysis of Horizontal pocket N-TFET based biosensor considering repulsive steric effects" , Materials Science and Engineering: B (Elsevier) Volume :296 / / 2023 DOI: https://doi.org/10.1016/j.mseb.2023.116620
    • 2022
  • A. Magla, R. Saha, and R. Goswami, "Impact on performance of dual stack hetero- gated dielectric modulated TFET biosensor due to Si1-xGex pocket variation" , Microelectronics Journal (Elsevier) Volume :in press / / 2022 DOI: https://doi.org/10.1016/j.mejo.2022.105603
  • R. Saha, R. Goswami, B. Bhowmick, and S. Baishya, "Comprehensive investigation on RF/analog parameters in ferroelectric tunnel FET" , Semiconductor Science and Technology (IOP) Volume :Accepted / 1-8 / 2022 DOI: 10.1088/1361-6641/ac3dd4
  • D. Deb, R. Goswami, R. Baruah, R. Saha and K. Kandpal, "Role of gate electrode in influencing interface trap sensitivity in SOI tunnel FETs" , Journal of Micromechanics and Microengineering (IOP) Volume :32 / 044006 / 2022 DOI: https://doi.org/10.1088/1361-6439/ac56e8
  • Jitendra Kumar, Rashi Chaudhary, Shreyas Tiwari and Rajesh Saha, "Comparison of RF/Analog and Linearity Performance of Various TFETs Using Source Engineering" , Silicon (Springer) Volume :Accepted / 1-8 / 2022 DOI: https://doi.org/10.1007/s12633-022-01868-4
  • R Saha and C Sahu, "Influence of dielectric material near tunnel junction on analog/RF and linearity figure of merits in hetero dielectric (HG) TFET: A detailed study" , International Journal of RF and Microwave Computer Aided Design (Wiley) Volume :32 / 22915 / 2022 DOI: https://doi.org/10.1002/mmce.22915
  • Rajesh Saha, Deepak Kumar Panda, and Rupam Goswami,, "Analysis on electrical parameters including temperature and interface trap charges in gate overlap Ge source step shape double gate TFET" , Microelectronics Journal (Elsevier) Volume :130 / 105629 / 2022 DOI: https://doi.org/10.1016/j.mejo.2022.105629
  • Shreyas Tiwari and Rajesh Saha, "DC and RF/analog performances of split source horizontal pocket and hetero stack TFETs considering interface trap charges: A simulation study" , Microelectronics Reliability (Elsevier) Volume :137 / 114780 / 2022 DOI: https://doi.org/10.1016/j.microrel.2022.114780
  • Shreyas Tiwari and Rajesh Saha, "Improved optical performance in near visible light detection photosensor based on TFET" , Microelectronics Journal (Elsevier) Volume :in press / 105554 / 2022 DOI: https://doi.org/10.1016/j.mejo.2022.105554
  • Shreyas Tiwari and Rajesh Saha, "Electrical Noise Analysis of Z Shape Horizontal Pocket and Hetero Stack TFETs under Trap Distribution" , ECS Journal of Solid State Science and Technology (IOS Press) Volume :0 / / 2022 DOI: 10.1149/2162-8777/acab85
  • N. Reddy, D. K. Panda, and R. Saha, "Analytical modelling for surface potential of dual material gate overlapped-on-drain TFET(DM-DMG-TFET) for label-free biosensing application" , AEU - International Journal of Electronics and Communications (Elsevier) Volume :151 / 154225 / 2022 DOI: https://doi.org/10.1016/j.aeue.2022.154225
  • D. Deb, R. Goswami, R. K. Baruah, K. Kandpal, and R. Saha, "Parametric investigation and trap sensitivity of n-p-n double gate TFETs" , Computers and Electrical Engineering (Elsevier) Volume :100 / 107930 / 2022 DOI: https://doi.org/10.1016/j.compeleceng.2022.107930
    • 2021
  • Rajesh Saha, Deepak Kumar Panda, Rupam Goswami, Brinda Bhowmick and Srimanta Baishya, "Analysis on Effect of Lateral Straggle on Analog, High Frequency and DC Parameters in Ge-source DMDG TFET" , International Journal of RF and Microwave Computer-Aided Engineering (Wiley) Volume :00 / 1-10 / 2021 DOI: 10.1002/mmce.22579
  • R. Saha, B. Bhowmick, and S. Baishya, "Hot Carrier Effect in Ferro-FinFET for variation in temperature, work function, and FE layer thickness" , Integrated Ferroelectrics (Taylor & Francis) Volume :221 / 1-8 / 2021 DOI: https://doi.org/10.1080/10584587.2021.1965842
  • Rajesh Saha , Deepak Kumar Panda , Rupam Goswami, Brinda Bhowmick, Srimanta Baishya, "DC and RF/Analog Parameters in Ge-source SD-ZHP-TFET: Drain and Pocket Engineering" , International Journal of Numerical Modelling: Electronic Networks, Devices and Fields (Taylor & Francis) Volume :Accepted / 1-8 / 2021 DOI: https://doi.org/10.1002/jnm.2967
  • R. Saha, "Simulation Study on Ferroelectric Layer Thickness Dependence RF/Analog and Linearity Parameters in Ferroelectric Tunnel Junction TFET  " , Microelectronics Journal (Elsevier) Volume :0 / 1-8 / 2021 DOI: 10.1016/j.mejo.2021.105081
  • Rajesh Saha, Brinda Bhowmick, and Srimanta Baishya, "Study on Impact of Ferroelectric Layer Thickness on RF/Analog and Linearity Parameters in Ferroelectric-FinFET" , International Journal of RF and Microwave Computer-Aided Engineering (Taylor & Francis) Volume :0 / 1-15 / 2021 DOI: doi.org/10.1002/mmce.22704
  • R. Saha, B. Bhowmick, and S. Baishya, "Dependence of Lateral Straggle Parameter on DC, RF/Analog, and Linearity Performance in SOI FinFET" , IETE Journal of Research (Taylor & Francis) Volume :press / 1-7 / 2021
  • Rajesh Saha, Rupam Goswami, Brinda Bhowmick, and Srimanta Baishya , "Performance Evaluation of Epitaxial Layer Based Gate Modulated TFET (GM-TFET)" , SILICON (Springer ) Volume :In press / 1-4 / 2021 DOI: https://doi.org/10.21203/rs.3.rs-732664/v1
  • Shreyas Tiwari and Rajesh Saha, "Methods to Reduce Ambipolar Current of Various TFET Structures: a Review" , SILICON (Springer ) Volume :Accepted / 1-8 / 2021 DOI: 10.1007/s12633-021-01458-w
  • Rajesh Saha, Yash Hirpara, and Shanidul Hoque, "Sensitivity Analysis on Dielectric Modulated Ge-source DMDG TFET Based Label-Free Biosensor" , IEEE Transactions on Nanotechnology (IEEE) Volume :Accepted / 1-9 / 2021 DOI: 10.1109/TED.2017.2657233
  • Yash Hirpara and R. Saha, "TCAD Simulation Study on Reliability issue of Heterojunction Heterodielectric FinFET: Effect of Interface Trap Charge, BOX Height, and Temperature" , Pramana - Journal of Physics (Springer ) Volume :Accepted / 1-10 / 2021 DOI: https://doi.org/10.1007/s12043-021-02210-0
    • 2020
  • Rajesh Saha, "Linearity Parameters Evaluation due to Lateral Straggle in Ge-Source DMDG-TFET" , Silicon (Springer US) Volume :14 / 1-5 / 2020 DOI: 10.1007/s12633-020-00859-7
  • K. Vanlalawmpuia, R. Saha,B. Bhowmick, "Study of effect of oxide thickness variation on electrical parameters and high frequency characteristic induced by work-function variation for delta-doped Germanium source vertical TFET" , Semiconductor Science and Technology (IOP Science) Volume :0 / -- / 2020 DOI: 10.1088/1361-6641/aba823
  • R. Saha, B. Bhowmick, and S. Baishya, "Dependence of Metal Gate Work Function Variation for Various Ferroelectric Thickness on Electrical Parameters in NC-FinFET" , FERROELECTRICS (Taylor & Francis) Volume :570 / -- / 2020 DOI: https://doi.org/10.1080/00150193.2020.1839256
  • R. Saha, R. Goswami, B. Bhowmick, and S. Baishya, "Dependence of RF/Analog and Linearity Figure of Merits on Temperature in Ferroelectric FinFET: A Simulation Study" , IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control (IEEE) Volume :67 / 2433-2439 / 2020 DOI: 10.1109/TUFFC.2020.2999518
  • S. N. Mishra, R. Saha and K. Jena, "Normally-Off AlGaN/GaN MOSHEMT as Lebel Free Biosensor" , ECS Journal of Solid State Science and Technology (IOP Science) Volume :9 / 1-10 / 2020 DOI: 10.1149/2162-8777/aba1cd
  • R. Saha, B. Bhowmick, and S. Baishya, "Impact of Work Function on Analog/RF and Linearity Parameters in Step-FinFET" , Indian Journal of Physics (Springer ) Volume :0 / 2387239 / 2020 DOI: 10.1007/s12648-020-01895-0
  • R. Saha, B. Bhowmick, and S. Baishya, "Impact of lateral straggle on linearity performance in gate-modulated (GM) TFET" , Applied Physics A: Material Science and Processing (Springer) Volume :126 / 1-4 / 2020 DOI: 10.1007/s00339-017-1545-6
  • Y. Hirpara and R. Saha, "Analysis on DC and RF/Analog Performance in Multifin-FinFET for Wide Variation in Work Function of Metal Gate" , Silicon (Springer) Volume :20 / 1-6 / 2020 DOI: https://doi.org/10.1007/s12633-020-00408-2
    • 2019
  • R. Saha, B. Bhowmick and S. Baishya, "Deep insights into electrical parameters due to metal gate WFV for different gate oxide thickness in Si step FinFET" , IET Micro & Nano Letters (IET) Volume :14 / 384-388 / 2019 DOI: 10.1049/mnl.2018.5220
  • R. Saha, B. Bhowmick, and S. Baishya, "Impact of WFV on Electrical Parameters due to High-k/Metal Gate in SiGe Channel Tunnel FET" , Microelectronics Engineering (Elsevier) Volume :214 / 1-4 / 2019 DOI: https://doi.org/10.1016/j.mee.2019.04.024.
  • R. Saha, B. Bhowmick, and S. Baishya, "Impact of Mole Fractions due to Work Function Variability (WFV) of Metal Gate on Electrical Parameters in Strained SOI-FinFET" , Silicon (Springer ) Volume :12 / 577-583 / 2019 DOI: 10.1007/s00339-020-3373-3
  • R. Saha, B. Bhowmick, and S. Baishya, "Analytical Threshold Voltage and Subthreshold Swing model for TMG FinFET" , International Journal of Electronics (Taylor & Francis) Volume :106 / 553-566 / 2019 DOI: https://doi.org/10.1080/00207217.2018.1545258
  • R. Saha, K Vanlalawmpuia, B.Bhowmick, and S.Baishya, "Deep Insight into DC, RF/Analog, and Digital Inverter Performance Due to Variation in Straggle Parameter for Gate Modulated TFET" , Materials Science in Semiconductor Processing (Elsevier) Volume :91 / 102-107 / 2019 DOI: https://doi.org/10.1016/j.mssp.2018.11.011
  • R. Saha, B. Bhowmick, and S. Baishya, "Quantum Modeling of Threshold Voltage in Ge Dual Material Gate (DMG) FinFET" , Solid-State Electronics (Elsevier) Volume :159 / 129-134 / 2019 DOI: 10.1016/j.sse.2019.03.047
  • R. Saha, B. Bhowmick, and S. Baishya, "Effect of Ge mole fraction on electrical parameters of Si1-xGex source step-FinFET and its application as an inverter" , Silicon (Springer ) Volume :11 / 209-219 / 2019 DOI: 10.1007/s12633-018-9846-8
    • 2018
  • R. Saha, B. Bhowmick, and S. Baishya, "Temperature effect on RF/analog and linearity parameters in DMG FinFET" , Applied Physics A (Springer) Volume :124 / 642 / 2018 DOI: 10.1007/s00339-018-2068-5
  • K. Vanlalawmpuia, R.Saha, and B.Bhowmick, "Performance Evaluation of Heterostacked TFET for variation in lateral straggle and its application as digital inverter" , Applied Physics A (Springer) Volume :124 / 701 / 2018 DOI: 10.1007/s00339-018-2121-4
  • R. Saha, B. Bhowmick, and S. Baishya, "GaAs SOI FinFET: impact of gate dielectric on electrical parameters and application as digital inverter" , Int. J. Nanoparticles (Inderscience Publishing ) Volume :10 / 3-14 / 2018
  • R. Saha, B. Bhowmick and S. Baishya,, "Effect of gate dielectric on electrical parameters due to metal gate WFV in n-channel Si step FinFET" , IET Micro & Nano Letters (IET) Volume :13 / 1007-1010 / 2018 DOI: 10.1049/mnl.2018.0189
  • R. Saha, B. Bhowmick, and S. Baishya, "A 3D Statistical Simulation Study of Titanium Metal Gate WFV on Electrical Parameters in n-channel Ge step-FinFET" , Applied Physics A (Springer) Volume :124 / 96 / 2018 DOI: 10.1007/s00339-017-1545-6
  • R. Saha, S. Baishya, and B. Bhowmick, "3D analytical modeling of surface potential, threshold voltage, and subthreshold swing in dual-material-gate (DMG) SOI FinFETs" , Journal of Computational Electronics (Springer) Volume :17 / 153-162 / 2018 DOI: 10.1007/s10825-017-1072-x
  • R. Saha, B. Bhowmick, and S. Baishya, "Quantum Analytical Modeling of Inversion Charge and Threshold Voltage in Nanoscale Bi-Level Uniform Gate FinFET" , ECS Journal of Solid State Science and Technology (Electrochemical Society) Volume :7 / 1-7 / 2018 DOI: 10.1149/2.0131802jss
  • R. Saha, B. Bhowmick, and S. Baishya, "Comparative Analysis among SMG, DMG, and TMG FinFETs: RF/Analog and Digital Inverter Performance" , Journal of Nanoelectronics and Optoelectronics (American Scientific Publishers) Volume :13 / 803-811 / 2018 DOI: 10.1166/jno.2018.2336
    • 2017
  • R. Saha, B. Bhowmick, and S. Baishya, "Si and Ge step-FinFETs: work function variability, optimization and electrical parameters" , Superlattices and Microstructures (Elsievier ) Volume :107 / 5-16 / 2017 DOI: 10.1016/j.spmi.2017.04.001
  • R. Saha, B. Bhowmick, and S. Baishya, "Statistical Dependence of Gate Metal Work Function on Various Electrical Parameters for an n-Channel Si Step-FinFET" , IEEE Transactions on Electron Devices (IEEE) Volume :64 / 969-976 / 2017 DOI: 10.1109/TED.2017.2657233
    • 2016
  • R. Saha, S. Maity, and C. T. Bhunia, "Design and characterization of a tunable patch antenna loaded with capacitive MEMS switch using CSRRs structure on the patch" , Alexandria Engineering Journal (Elsevier) Volume :55 / 2621–263 / 2016 DOI: 10.1016/j.aej.2016.05.002
  • R. Saha, S. Maity, N. G. Devi, and C. T. Bhunia, "Analysis of Pull-in-Voltage and Figure-of-Merit of Capacitive MEMS switch" , Transaction on Electrical and Electronics Material (Springer) Volume :17 / 129-133 / 2016 DOI: https://doi.org/10.4313/TEEM.2016.17.3.129
  • R. Saha, and S. Maity, "Ameliorate Of Bandwidth and Return Loss Of Rectangular Patch Antenna Using Metamaterial Structure For RFID Technology" , Journal of Engineering Science & Technology (International Journal) Volume :11 / 1249-1262 / 2016
    • 2015
  • R. Saha, C. T. Bhunia, and S. Maity, "Design of Micromachining Based Patch Antenna to Enhance Performances for RFID Tag Application" , IJFGCN (International Journal) Volume :8 / 261-268 / 2015
  • N. G. Devi, S. Maity, R. Saha, and S. K. Metya, "RF-MEMS and CSRRs Based Tunable Filter Designed for Ku and K Bands Application" , COGENT ENGINEERING (Taylor and Francis) Volume :2 / 1-11 / 2015 DOI: https://doi.org/10.1080/23311916.2015.1083641

    2023
  • J. Kumar, R. Chaudhary and R. Saha, "Performance Analysis of Dielectric Modulated Dual Material Double Gate Hetero Stack DM-DMDG-HS TFET" , International Conference on Intelligent and Innovative Technologies in Computing, Electrical and Electronics by :IEEE at Bangaluro / 296-301 / 2023
  • H. K. Phulawariya, R. Chaudhary, S. Tiwari and R. Saha, "Realization of Logic Performance Using Double Gate TFET DG-TFET and Ge Source DG-TFET S-Ge-TFET" , AISP 2023 by :IEEE at VIT AP University / 1-5 / 2023
  • Ravindra Kumar Maurya, Vivek Kumar, Rajesh Saha, Brinda Bhowmick, "Effects of FerroThickness and Temperature on Electrical Performance of SiHfO2 Based NC FinFET" , 2023 11th International Symposium on Electronic Systems Devices and Computing by :IEEE at Sri City India / / 2023
    • 2022
  • Rajesh Saha, Brinda Bhowmick, and Srimata Baishya, "RF/Analog Parameters in DMG-FinFET for Channel Material Beyond Si" , AISP 2022 by :IEEE at VIT AP University / / 2022
    • 2021
  • Rajesh Saha, Deepak Panda, Rupam Goswami, Brinda Bhowmick and Srimanta Baishya , "Effect of Drain Engineering on DC and RF Characteristics in Ge-Source SD-ZHP-TFET " , DevIC 2021 by :IEEE at Kalyani, Kolkata / / 2021
  • Deepjyoti Deb, Rupam Goswami, Ratul Baruah, Kavindra Kandpal, Rajesh Saha, "An SOI N-P-N Double Gate TFET for Low Power Applications " , DevIC 2021 by :IEEE at Kalyani, Kolkata / / 2021
    • 2020
  • GPVY Nikhil, Chinmay Dimri, PK Mohanty, R Saha, and S Routray, "High-κ Dielectrics on 20nm FDSOI FinFET: Study on Analog and RF Performance" , 2020 IEEE Calcutta Conference (CALCON) by :IEEE at Kolkata / 102-105 / 2020
  • Rajesh Saha, Rupam Goswami, Brinda Bhowmick and Srimanta Baishya, "Electrical Performance of Gate Modulated TFET (GM-TFET) With Epitaxial Layer" , 7th International Conference on Microelectronics, Circuits and Systems 2020 (Micro 2020) by :Conference Proceeding at Delhi Technological University, Delhi / / 2020
    • 2017
  • R. Saha, B. Bhowmick and S. Baishya, "Effects of Temperature on Electrical Parameters in GaAs SOI FinFET and Application as Digital Inverter" , 2017 Devices for Integrated Circuit (DevIC) by :IEEE at Kalyani, India / 462-466 / 2017
    • 2015
  • R. Saha, S. Maity, and N. Trigunayat, "Enhancementof Gain, Bandwidth and Directivity of a Patch Antenna by Increasing Dielectric Layers of the Substrate Through Micromachining Technique for RFID Application" , 2015 International Conference on Advances in Computer Engineering and Applications by :IEEE at Ghaziabad, India / / 2015
    • 2014
  • R. Saha, S. Bhattacharjee, C. T. Bhunia, and S. Maity, "Dual Band Operation Using Metamaterial Structure for Radio Frequency Identiication (RFID) System" , 2014 International Conference on Signal Propagation and Computer Technology (ICSPCT) by :IEEE at Govt. Engg. College of Ajmer, Rajasthan / 16-19 / 2014
  • S. Bhattacharjee, R. Saha, and S. Maity, "Metamaterial Based Patch Antenna With Omega Shaped Slot for RFID System" , 2014 International Conference on Advances in Engineering & Technology Research by :IEEE at Unnao, India / / 2014

  • Reference Book, "Contemporary Trends in Semiconductor Devices: Theory, Experiment and Applications" ISBN:1876-1100 published by - Springer Year: 2022 authors- Rupam Goswami and Rajesh Saha
  • Reference Book, "Simulation and Modelling of Emerging Devices: Tunnel FET and FINFET" ISBN:13: 978-1-5275-0702-9 published by - Cambridge Scholars Publishing Year: 2023 authors- B. Bhowmick, R. Goswami, and R. Saha

  • Book Chapter, "A novel MEMS based frequency tunable rectangular patch antenna" ISBN:978-81-322-2638-3 published by - Springer Year: 2016 authors- R. Saha, S. Maity, and L. Sarkar
  • Book Chapter, "RF/Analog and Linearity Performance Evaluation of a Step-FinFET under Variation in Temperature" ISBN:9781003097723 published by - CRC Press Year: 2020 authors- Rajesh Saha, Brinda Bhowmick and Srimanta Baishya
  • Book Chapter, "Effect of Au-Al Dual-Metal Gate on 3D Double-Gate Junctionless Transistor Performance" ISBN:978-981-16-2108-6 published by - Springer Year: 2021 authors- Achinta Baidya, Rajesh Saha, Amarnath Gaini, Chaitali Koley, Somen Debnath, and Subir Datta
  • Book Chapter, "Effect of Dielectric Material on Electrical Parameters Present near Source Region in Hetero Gate Dielectric TFET" ISBN:9781003126645 published by - CRC Press Year: 2021 authors- Rajesh Saha, Suman Kumar Mitra, Deepak Kumar Panda
  • Book Chapter, "Effect of Channel Doping Variation on Electrostatic Characteristics of 3D Double Gate Junctionless Transistor" ISBN:978-981-16-2108-6 published by - Springer, Singapore Year: 2021 authors- Achinta Baidya, Rajesh Saha, Amarnath Gaini, Chaitali Koley, Somen Debnath, and Subir Datta

  • International level FDP on MATLAB Programming at MNIT Jaipur, Jaipur, India from 22-08-2022 to 02-09-2022
  • International level FDP on Research methodology and authoring/reviewing Manuscripts at MNIT Jaipur, Jaipur, India from 25-07-2022 to 05-08-2022
  • International level FDP on Scientific Computation and GUI Development Using MATLAB at MNIT Jaipur, Jaipur, India from 21-03-2022 to 31-03-2022
  • National level Workshop on Emerging CMOS Technologies and Beyond: Trends and Challenges at MNIT Jaipur, Jaipur, India from 26-11-2020 to 30-11-2020
  • International level Conference on AISP 2020 at VIT AP University, Amaravati, AP, India from 10-01-2020 to 12-01-2020
  • International level Seminar on Benefits and Opportunities of IEEE at VIT AP University, Amaravati, AP, India from 31-08-2019 to 31-08-2020

  • International level Conference on Devices for Integrated Circuit (DevIC)-2017 at Kalyani Government Engineering College, Kolkata, India from 23-03-2017 to 24-03-2017
  • International level Workshop on Nanoelectronics Challenges for Internet of Things at National Institute of Technology Silchar, Silchar, India from 05-02-2017 to 09-02-2017
  • National level Workshop on Nanoelectronics and VLSI Desig at National Institute of Technology Silchar, Silchar, India from 14-04-2016 to 15-04-2016
  • International level Conference on IEEE International Conference on Signal Propagation And Computer Technology at Govt. Engg College Ajmer, Ajmer, India from 12-07-2014 to 14-07-2014

  • Senior Member of IEEE
  • Member of IEEE EDS

    Ongoing
  • Shreyas Tiwari on Tunnel FET Year - 2021
  • Rashi Chaudhary on FinFET Year - 2020

    2021-2022
  • Mrigendra Singh on Physical Design implementation of block design using OCC for Clock Control Year - 2021-2022 (Completed)
  • Gara Srinivasar on Electrical Parameter Analysis of PIN and NPN Double Gate TFETs Year - 2021-2022 (Completed)
  • JITENDRA KUMAR on Analysis on RF/Analog parameters of Hetero-stacked TFET and its application as Biosensor Year - 2021-2022 (Completed)
    • 2020-2021
  • Krishna Pal on Optimization of Electrical Parameters for CNT FET Year - 2020-2021 (Completed)

  • Topic: DESIGN AND ANALYSIS OF DOUBLE GATE TFET (DG-TFET) BASED BIOSENSOR Year - 2021-2022
    Tarun Kumar Bhardwaj (Completed)
    2018uec1759 (Completed)
    Sagar Bharti (Completed)
    Shubhankar Shyamal (Completed)
  • Topic: THIRD EYE FOR THE BLIND Year - 2020-2021
    Ayush Mangla (Completed)
    Mohit Soni (Completed)
    Vedashree Bhide (Completed)
    Akhila Oruganti (Completed)

Title Total Outlay
(In Lacs)		 Year Funding Agency Role
Impact of Lateral Straggle on the Logic Gates, SRAM, and Ring Oscillator in Silicon on Insulator (SOI) Tunnel FET 23.082019-2022SERB DSTPI

  • Faculty Advisor, Quiz Club in MNIT Jaipur from - 10-10-2022 to Till Date
  • Member of DUGC in MNIT Jaipur from - 01-10-2021 to Till Date
  • Departmental Time Table Coordinator in MNIT Jaipur from - 10-08-2021 to Till Date
  • Faculty-in-Charge, IC/MEMS Lab in MNIT Jaipur from - 04-02-2021 to Till Date
  • Faculty Coordinator of IEEE Student Branch in VIT AP University from - 19-09-2018 to 26-02-2020

  • "A System for Developing and Analyzing a Parameter of Bohm Quantum Potential", Ravindra Kumar Maurya, Brinda Bhowmick, Rajesh Saha , Reg.No. 202022105580 [Germany patent Granted] Patent Granted Dt.10-11-2022
  • "PORTABLE SYSTEM FOR FAST DETECTION OF P, QRS AND T WAVE FROM ECG SIGNALS", U. Bhatt, S. Singh, B. Bhowmick, and Rajesh Saha , Reg.No. 201931027301 [The Patent Office] Filed Dt.09-08-2019

  • Enlisted in top 2% Scientist in the world list for given by Stanford University and Elsevier Year - 2023
  • IEI Young Engineers Award 2022-23 for given by The Institution of Engineers (India) Year - 2022
  • Best Paper Award for for Paper Presentation given by 4th Int. Conference DevIC 2021 Year - 2021
  • Best Session Paper Award for Paper presented at Micro 2020 given by 7th International Conference on Microelectronics, Circuits and Systems 2020 (Micro 2020), Year - 2020

SNo. Type Title Event Place Schedule
1KeynoteStatistical Variability Analysis in Nanoelectronics Devices: Tunnel FETs and FinFETs5 Days STTP on Electronic Systems: Devices, IC and Applications by ATALNIT Arunachal PradeshMar-2022
2KeynoteModeling Strategies in FinFET5 Day FDP cum STTP on Simulation, Modeling, and Application of Advanced Semiconductor DevicesHBTU KanpurJun-2021
3TalkNanoscale device modeling and simulationFDPVIT VelloreMar-2021
4TalkEmerging CMOS Technologies and Beyond: Trends and ChallengeWorkshopMNIT JaipurNov-2020
5TalkStatistical Simulation and RF/Analog Performance of Nanoscale Devices: FinFETs and TunnelFETsExpert TalkKL UniversitySep-2020
6TalkNano-Electronic Devices: FinFETs and TunnelFETsWebinarSVCET, Chittor, APJun-2020
7TalkFinFETs and TunnelFETs for Future Nano Scale CMOS TechnologyExpert TalkSree Vidyanikethan Engineering College, AnantapurSep-2019