Cyber Security, Computer Architecture, Processor architecture & micro-architecture, Memory system design, Reconfigurable computing, Adaptive computing/architectures, Compiler support for modern architectures, Fault-tolerant computing, Robust design and architectures, Self-healing system design, VLSI testing and design for testability, SoC/NoC design and test, Post silicon debug, High level synthesis, Formal verification, Trusted computing, FPGA based acceleration, Trusted hardware design, Cyber physical systems, Network router design and algorithms, Software defined networking (SDN), Blockchain.
Faculty member, Indian Institute of Technology Bombay (Since Dec 2011) Faculty member, SERC, Indian Institute of Science (IISc), Bangalore (May 2007 - Dec 2011) Scientist, Central Electronics Engg. Research Institute (CEERI), Pilani (Mar 1997 - May 20)